JOHN WAWRZYNEK, PH.D.
Professor of Electrical Engineering and Computer Sciences
University of California - Berkeley
Reconfigurable Systems and a Research Accelerator for Multiple Processors (RAMP)
ABSTRACT: The Research Accelerator for Multiple Processors (RAMP) is an affordable and versatile multiprocessor emulation platform being built as a large collaborative effort. RAMP hardware, from processors to coherent caches to networks, is implemented in field-programmable gate arrays (FPGAs) for flexibility, accuracy, visibility, cost and performance. It is designed to be composable, where different components can be quickly written, assembled and run. By using hardware rather than simulation, RAMP is fast enough to run real codes and be useful to software. By using conventional instruction set architectures and providing peripheral support required by operating systems, RAMP will run full, unmodified software stacks. RAMP's intended audience includes anyone designing and using multiprocessor systems, including architect researchers, software developers, and end users. In this talk, I will describe the background and current state of the RAMP development and related projects using the underlying FPGA platform.
BIO: John Wawrzynek is a Professor of Electrical Engineering and Computer Sciences at the University of California, Berkeley. He holds a Ph.D. and M.S. in Computer Science from the California Institute of Technology and a M.S. in Electrical Engineering from the University of Illinois, Urbana/Champaign. He currently teaches courses in computer architecture, VLSI system design, and reconfigurable computing. He is co-director of the Berkeley Wireless Research Center and Principle Investigator of the Research Accelerator for Multiple Processors (RAMP) project. More information may be found at http://www.cs.berkeley.edu/~johnw.
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